This invention relates generally to an electronic timepiece and in particular to a structure for mounting an integrated circuit chip in the timeplace.
Electronic timepieces including integrated circuit ("IC") chips are known in the art as disclosed by Japanese Laid Open Application Nos. 59-138341, 56-50544 and 59-120884. In these prior art timepieces the terminals of the IC chip are connected to a circuit wiring pattern by gold wire, welding, and soldering the circuit pattern leads to the IC chip terminals. A molding or bonding agent is used to reinforce the connection between the IC chip and the circuit leads.
These prior art connections have been satisfactory however they are disadvantageous in that they require an extra step of welding, soldering or connecting a gold wire in order to connect the IC chip to the circuit pattern. Additionally, such a process is irreversible, making it impossible to remove the IC chip for replacement or repair without removing the entire circuit pattern. Furthermore, since the IC chip and the circuit board to which it is attached are two of the more expensive components of a timepiece, removing the entire circuit block for repair increases the cost of repair.
Accordingly, it is desirable to provide a structure for mounting the IC chip which overcomes the shortcomings of the prior art device described above.